: ( /, , .), CSL ( FPGA ) , , , Triscend . , Triscend FastChip ( S), .
, , , , . .
(CSL) . (, , .), . () ( VHDL).
.
Triscend FastChip . , . Triscend FastChip. : - (, . .), (CSL) /. , ( , /).
( ). : ( ), . , , (CSL). ( 256 16 ).
|
|
|
. , , , . . (Initialization Fale), (View Header).
(CSL). . Triscend FastChip , . Triscend FastChip ( , , . .), (, , . .). LUTs (Look-Up Tables) , FPGA, . , . , .
. "" FPGA Triscend. " Triscend" . D, FPGA Express "Synopsys" ( Verilog HDL). EDIF2.0.0. , , .
( CSL) , "Synopsys" "Cadence". , ( ) ( VHDL,EDIF,Verilog).
, : CSL, Configurable System Interconnect (CSI) Bus, ( ); CSL CSL, , . .
() ( CSL). , .
