. 7.5 , - 580.
ϳ 58080, (Ҳ) 58024 - () 58028. Ҳ F 1 F 2 ( ), . .
7.5 580
, (DBIN DATA BUS INPUT) , , (HLDA HOLD ACKNOWLEDGE) , 8- (PCSW PROCESSOR STATUS WORD), . :
D 7 (MEMR MEMORY READ), .
D 6 (INP INPUT CYCLE), .
D 5 1, .
D 4 (OUT OUTPUT CYCLE), / .
D 3 (HLTA HALT ACKNOWLEDGE), .
D 2 (ST STACK), .
D 1 - ( WRITE-OUTPUT), .
D 0 (INTA INTERRUPT ACKNOWLEDGE), .
(STSTB STATE STROBE) . ; (BUSEN ) , 1.
:
;
( MEMORY WRITE) ;
( INPUT-OUTPUT READ) ;
( INPUT-OUTPUT WRITE) ;
(INTA) ;
(WAIT) , ;
(INTE INTERRUPT ENABLE) .
:
(HOLD) , ;
(INT INTERRUPT) ;
( RESET IN) (RESET) , ;
(RDYIN READY IN) (READY) .
. .
, , . ϳ - , , , .
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: . , . , , 1...5.
-.
- 1...5, Ҳ (. 7.6).
7.6 '
F 1. 58080 2 , 0,5 . . , , , , 4 18 .
10 , 10 , . 7.1.
7.1
. | ||
- 1, :
1 () () , 1 (); 2...5 1 () -. 1 ().
2 , (DBIN) () . 2 (READY), (HOLD) (HL). 2 2...5 , 䳿 .
3 , , () . 2...5 3 , , , .
4, 5 , , 2...5 - . 2...5 4 䳿 , 5 .
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. 7.7 , . 7.8 .
7.7 ( )
7.8
, 2. , = 0 2 , . 7.7 7.8, Tw .