XDIV 1 129.
7 - IVEN. XTAL. 1 XDIVEN CPU XDIV6 - XDIV0 . , . , .
6..0 - XDIV6..XDIV0. . XDIVEN. d, CPU fclk=XTAL/(129-d).
XDIVEN ( 0). XDIVEN, XDIV6..XDIV0 . XDIVEN XDIV6..XDIV0 . , MCU, .
MCUCR
SRE | SRW10 | SE | SM1 | SM0 | SM2 | IVSEL | IVCE | |
W/R | W/R | W/R | W/R | W/R | W/R | W/R | W/R | W/R |
7 SRE. SRAM. 1 SRE SRAM AD0-7 ( A), A8-15 ( C), WR RD . SRE . SRE ( 0) SRAM .
6 SRW10. SRAM. 1 SRW SRAM . 0 SRW10 SRAM .
5 SE. Sleep. 1 SE MCU sleep SLEEP. MCU sleep, SE SLEEP.
4,3 - SM1, SM0. Sleep. sleep, 2.6.
2.6. Sleep
SM1 | SM0 | Sleep Mode | |
Idle | |||
Power Down | |||
Power Save |
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1 IVSEL. . IVSEL (=0), -. (=1), -. BOOTSZ. IVSEL:
1. 1 (IVCE).
2. IVSEL, 0 IVCE.
. IVCE IVSEL. IVSEL , 4 . I [3].
0 IVCE. . IVCE 1, IVSEL. IVCE 1 IVSEL. IVCE , IVSEL .
Move_interrupts:; ldi r16, (1<<IVCE)out MCUCR, r16; -ldi r16, (1<<IVSEL)out MCUCR, r16ret
1. AVR.
2. AVR?
3. RISC-? RISC-?
4. FLASH AVR?
5. EEPROM AVR?
6. ?
7. ? .
8. AVR? ?
9. picoPower?
10. AVR
11. AVR
12. . .
13. (). .
14. . . .
15. SREG . SREG.
16. SREG.
17. I ( ) .
18. , I ?
19. T ( ) .
20. . . .
21. . . . . ?
22. , () POP PUSH?
23. , () CALL RET?
24. RET RETI?
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25. . . . .
26. . .
27. EIMSK . .
28. EIFR . .