1. 充.3
2. .......4 3. ....6
:
23. - 10 , . : . 105 . 1 . , 155 . 3015 . 2 . . , . , 21 . , . 16 .
:
1) .
2) ( ), .
3) , , .
4) , . 5) .
:
CAFE STORAGE 9
Gist1 TABLE MP1,0,20,27
Gist2 TABLE MP1,0,20,27
generate 30,15
mark 1
mark 2
priority 2
GATE SNF CAFE,PC_res
transfer,ent_c
generate 10,5
mark 1
mark 2
priority 1
GATE SNF CAFE,LinkPC
ent_c ENTER CAFE
TEST E PR,1,PC_time
ADVANCE (exponential(1,0,60))
transfer,ext
PC_time ADVANCE (exponential(1,0,120))
ext LEAVE CAFE
unlink SpisPC,met1,1
TEST E PR,1,tabu2
tabulate Gist1
terminate
tabu2 tabulate Gist2
terminate
met1 TEST E PR,1,met2
transfer,met3
met2 TEST G MP1,(Uniform(1,10,20)),quit2
transfer,ent_c
met3 TEST G MP1,(Uniform(1,1,3)),quit1
transfer,ent_c
quit1 terminate
quit2 terminate
PC_res TEST E F$RES_PC,0,LinkPC
SEIZE RES_PC
ADVANCE (exponential(1,0,120))
RELEASE RES_PC
tab2 tabulate Gist2
terminate
LinkPC LINK SpisPC,PR
generate 960
terminate 1
start 1
:
1) .
FACILITY ENTRIES UTIL. AVE. TIME AVAIL. OWNER PEND INTER RETRY DELAY
RES_PC 5 0.644 123.579 1 0 0 0 0 0
STORAGE CAP. REM. MIN. MAX. ENTRIES AVL. AVE.C. UTIL. RETRY DELAY
|
|
CAFE 9 2 0 9 109 1 7.755 0.862 0 0
2) ( ), .
:
:
3) , , .
, :
QUIT1 30 TERMINATE 3 0 0
, :
QUIT2 31 TERMINATE 8 0 0
4) , .
CAFE STORAGE 13
QUIT1 30 TERMINATE 0 0 0
QUIT2 31 TERMINATE 0 0 0
5) .
Simulation in Progress.
06/05/12 03:59:30 Halt. XN: 25. Block 1 Next.
06/05/12 03:59:30 Clock:199.973550. Next: GENERATE. Line 4.
STEP 1
Simulation in Progress.
06/05/12 03:59:30 Halt. XN: 25. Block 2 Next.
06/05/12 03:59:30 Clock:199.973550. Next: MARK. Line 5.
Generate 30,15
STEP 1
Simulation in Progress.
06/05/12 03:59:31 Halt. XN: 25. Block 3 Next.
06/05/12 03:59:31 Clock:199.973550. Next: MARK. Line 6.
Mark 1
STEP 1
Simulation in Progress.
06/05/12 03:59:31 Halt. XN: 25. Block 4 Next.
06/05/12 03:59:31 Clock:199.973550. Next: PRIORITY. Line 7.
Mark 2
STEP 1
Simulation in Progress.
06/05/12 03:59:31 Halt. XN: 25. Block 5 Next.
06/05/12 03:59:31 Clock:199.973550. Next: GATE. Line 8.
Priority 2
STEP 1
Simulation in Progress.
06/05/12 03:59:31 Halt. XN: 25. Block 32 Next.
06/05/12 03:59:31 Clock:199.973550. Next: TEST. Line 38.
STEP 1
Simulation in Progress.
06/05/12 03:59:32 Halt. XN: 25. Block 33 Next.
06/05/12 03:59:32 Clock:199.973550. Next: SEIZE. Line 39.
06/05/12 03:59:32 PC_res TEST E F$RES_PC,0,LinkPC
STEP 1
Simulation in Progress.
06/05/12 03:59:32 Halt. XN: 25. Block 34 Next.
06/05/12 03:59:32 Clock:199.973550. Next: ADVANCE. Line 40.
SEIZE RES_PC
STEP 1
Simulation in Progress.
06/05/12 04:00:50 Halt. XN: 25. Block 35 Next.
06/05/12 04:00:50 Clock:231.163526. Next: RELEASE. Line 41.
ADVANCE (exponential(1,0,120))
STEP 1
Simulation in Progress.
06/05/12 04:00:50 Halt. XN: 25. Block 36 Next.
06/05/12 04:00:50 Clock:231.163526. Next: TABULATE. Line 42.
RELEASE RES_PC
STEP 1
Simulation in Progress.
06/05/12 04:00:50 Halt. XN: 25. Block 37 Next.
06/05/12 04:00:50 Clock:231.163526. Next: TERMINATE. Line 43.
Tab2 tabulate Gist2