STATUS (03h 83h)
- | ||||
IRP | , 0 | - | ||
RP1 | , 0 | - | ||
RP0 | ( ) 1= 1 (80h-FFh) 0= 0 (00h-7Fh) | R/W-0 | ||
-TO | WDT 1= POR, CLRWDT SLEEP 0= WDT | R-1 | ||
-PD | 1= POR, CLRWDT 0= SLEEP | R-1 | ||
Z | 1= 0= | R/W-x | ||
DC | / (ADDWF, ADDLW,SUBLW,SUBWF) 1= 0= | R/W-x | ||
C | / 1= 0= | R/W-x | ||
: 1. C DC , SUBLW SUBWF. . . (RRF,RLF) . |
OPTION_REG (81h)
- | ||||
-RAPU | PORTA 1= 0= | R/W-1 | ||
INTEDG | INT 1= RA2/INT 0= RA2/INT | R/W-1 | ||
T0CS | TMR0 1= RA2/TOCKI 0= (CLKOUT) | R/W-1 | ||
T0SE | TMR0 1= 1 0, RA2/TOCKI 0= 0 1, RA2/TOCKI | R/W-1 | ||
PSA | 1= WDT 0= TMR0 | R/W-1 | ||
PS2-PS0 | 000=1:2 TMR0=1:1 WDT 001=1:4 TMR0=1:2 WDT 010=1:8 TMR0=1:4 WDT 011=1:16 TMR0=1:8 WDT 100=1:32 TMR0=1:16 WDT 101=1:64 TMR0=1:32 WDT 110=1:128 TMR0=1:64 WDT 111=1:256 TMR0=1:128 WDT | R/W-1 | ||
: WDT (3- =1), TMR0 1:1 |
INTCON (0Bh 8Bh)
|
|
- | ||||
GIE | 1= 0= | R/W-0 | ||
PEIE | 1= 0= | R/W-0 | ||
T0IE | TMR0 1= 0= | R/W-0 | ||
INTE | RA2/INT 1= 0= | R/W-0 | ||
RAIE | PORTA ( IOCA ) 1= 0= | R/W-0 | ||
T0IF | TMR0 1= TMR0 ( ) 0= | R/W-0 | ||
INTF | RA2/INT 1= RA2/INT ( ) 0= | R/W-0 | ||
RAIF | PORTA 1= PORTA ( ) 0= PORTA | R/W-0 | ||
: T0IF 1, TMR0, , T0IF. |
PIE1 (8Ch)
- | ||||
EEIE | EEPROM 1= 0= | R/W-0 | ||
ADIE | ( 16F676) 1= 0= | R/W-0 | ||
- | : 0 | - | ||
- | : 0 | - | ||
CMIE | 1= 0= | R/W-0 | ||
- | : 0 | - | ||
- | : 0 | - | ||
TMR1IE | TMR1 1= 0= | R/W-0 | ||
: , 1 PEIE INTCON. |
PIR1 (0Ch)
- | ||||
EEIF | EEPROM 1= EEPROM ( ) 0= EEPROM | R/W-0 | ||
ADIF | ( 16F676) 1= ( ) 0= | R/W-0 | ||
- | : 0 | - | ||
- | : 0 | - | ||
CMIF | 1= ( ) 0= | R/W-0 | ||
- | : 0 | - | ||
- | : 0 | - | ||
TMR1IF | TMR1 1= ( ) 0= | R/W-0 | ||
: GIE INTCON. . |
PCON (8Eh)
|
|
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
- | : 0 | - | ||
- | : 0 | - | ||
- | : 0 | - | ||
- | : 0 | - | ||
-POR | , MCLR WDT ( 1, ) 1= 0= | R/W-0 | ||
-BOD | ( 1, ) 1= 0= | R/W-x |
OSCCAL (90h)
- | ||||
CAL5 | CAL5-CAL0 - 4 111 111= 100 000= 000 000= | R/W-0 | ||
CAL4 | ||||
CAL3 | ||||
CAL2 | ||||
CAL1 | ||||
CAL0 | ||||
- | : 0 | - | ||
- | : 0 | - |
PORTA (05h)
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
RA5 | ( TRISA) | R/W-x | ||
RA4 | ||||
RA3 | ||||
RA2 | ||||
RA1 | ||||
RA0 |
TRISA (85h)
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
TRISA5 | RA5: 1= , 0= | R/W-x | ||
TRISA4 | RA4: 1= , 0= | |||
TRISA3 | RA3: 1 | R-1 | ||
TRISA2 | RA2: 1= , 0= | R/W-x | ||
TRISA1 | RA1: 1= , 0= | |||
TRISA0 | RA0: 1= , 0= |
WPUA (95h)
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
WPUA5 | , : 1-.,0-. | R/W-1 | ||
WPUA4 | , : 1-.,0-. | |||
- | : 0 | - | ||
WPUA2 | , : 1-.,0-. | R/W-1 | ||
WPUA1 | , : 1-.,0-. | |||
WPUA0 | , : 1-.,0-. | |||
: . , RAPU OPTION_REG. |
IOCA (96h)
|
|
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
IOCA5 | RA5: 1=, 0= | R/W-0 | ||
IOCA4 | RA4: 1=, 0= | |||
IOCA3 | RA3: 1=, 0= | |||
IOCA2 | RA2: 1=, 0= | |||
IOCA1 | RA1: 1=, 0= | |||
IOCA0 | RA0: 1=, 0= | |||
: RA5-RA0, , GIE INTCON , RAIE INTCON. |
PORTC (07h)
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
RC5 | ( TRISC) | R/W-x | ||
RC4 | ||||
RC3 | ||||
RC2 | ||||
RC1 | ||||
RC0 |
TRISC (87h)
- | ||||
- | : 0 | - | ||
- | : 0 | - | ||
TRISC5 | RC5: 1= , 0= | R/W-1 | ||
TRISC4 | RC4: 1= , 0= | |||
TRISC3 | RC3: 1= , 0= | |||
TRISC2 | RC2: 1= , 0= | |||
TRISC1 | RC1: 1= , 0= | |||
TRISC0 | RC0: 1= , 0= |
T1C0N (10h)
- | ||||
- | : 0 | - | ||
TMR1GE | TMR1 -T1G TMR1ON=1: . TMR1ON=0: 1= TMR1 , -T1G . 0= TMR1 | R/W-1 | ||
T1CKPS1 | TMR1 11=1:8 10=1:4 01=1:2 00=1:1 | |||
T1CKPS0 | ||||
T1OSCEN | TMR1 INTOSC CLKOUT: 1= LP TMR1 . 0= LP . : . | |||
-T1SYNC | . TMR1CS=1: 1= . 0= . TMR1CS=0: . TMR1 . | |||
TMR1CS | 1= T1OSO/T1CKI ( ) 0= (Fosc/4) | |||
TMR1ON | TMR1 1= TMR1 0= TMR1 |
CMCON (19h)
|
|
- | ||||
- | : 0 | - | ||
COUT | CINV=0: 1=VIN+ > VIN- 0=VIN+ < VIN- CINV=1: 0=VIN+ > VIN- 1=VIN+ < VIN- | R-0 | ||
- | : 0 | - | ||
CINV | 1= 0= | R/W-0 | ||
CIS | CM2:CM0=101 CM2:CM0=110 1= VIN- CIN+ 0= VIN- CIN- | |||
CM2 | : ( POR) CM2:CM0=000 CM2:CM0=111 CM2:CM0=010 CM2:CM0=100 CM2:CM0=011 , CM2:CM0=101 CM2:CM0=001 CM2:CM0=110 | |||
CM1 | ||||
CM0 | ||||
: |
-
: PORTA, , 0. , , . , , . |