- (-) .
, .
: , , ().
(). - . SIMENS, STEP7.
STEP 7 , , , . , , , .
:
) ;
) ;
) ;
) ;
) .
S7, STEP 7, STEP 7 , , , .
S7
CPU
CPU . CPU . CPU :
1 : ( S7-300) ( S7-400) , c , .
2 : .
3 : . , DB: DB DB, DB DI. DB , ( ) c .
|
|
|
4 : , .
S7-CPU :
1 , . RAM FLASH EPROM.
2 (RAM), S7-, . .
3 - , c .
4 (RAM) , , . , , .
( 3).
3 -
:
MCR (Master Control Rela). -
Master Control Relay - " " , , , . STEP7 MCR- , .. .
( )
CPU. , .
/FC - First Check Bit -
. , /FC = "". /FC "" (=, R, S), , RLO BR. . /FC:
| /FC = "1", | ||||
|
| , | |||
| RJLO. | ||||
| /FC = | "", | |||
| , | .. | |||
| . | ||||
RLO - Result of Logic Operation -
. , 1, , 0. (RLO) :
, RLO. ,
|
|
|
.. /F="1".
, .. /FC= "", RLO, .. .
RLO . . RLO="1", RLO"0".
, , - ..
STA - Status Bit -
(U, UN, , ON, X. XN) .
, (=. R, S), STA , , , .. , . , , "1". , , .
OR -
OR "" "". "1", RLO "" =1. "". OR.
OV - Overflow -
, . OV , (, , ). OV .
OS - Overflow Stored -
OS OV, . OS OV , , OV. . , , <> . "" , , SI'S (,
OS="1").
BR - Binary Result Bit -
BR . .
, BR (FC) (FB) STL. LAD. FB FC STL. LAD, RLO BR , (ENO) LAD. ENO , .
(SFC) (SFB) , BR ,
SFC SFB:
. BR = "". . BR = " 1".
, 1 - Condition Codes -
1
.
